A logical qubit got better when researchers gave it more physical qubits to work with. That sentence sounds backwards. For roughly thirty years, it was also an open question — whether adding qubits would help at all, or whether the extra hardware would simply bring extra noise with it and bury the gain.
Google's Willow processor settled the question with a measurement. The 105-qubit superconducting chip's logical error rate did not creep up as its qubit arrays grew from 3x3 to 5x5 to 7x7. It fell, halving with each increase in code distance.
Read that again, slowly. More physical qubits. Fewer logical errors.
That is what "below threshold" means in practice, and it is why the result carries so much weight in a multi-source 2025-2026 quantum computing research survey. Error correction had been a theoretical promise for about three decades. Willow turned it into a measured curve.
The coherence numbers moved in the same direction. Willow reported T1 coherence times of 68 microseconds, roughly five times the figure for the prior Sycamore generation. Reported gate fidelities were 99.97% for single-qubit gates, 99.88% for two-qubit gates, and 99.5% for readout.
Then came the demonstration. Willow ran the "Quantum Echoes" algorithm, simulating out-of-time-order correlators relevant to NMR spectroscopy, approximately 13,000 times faster than the world's fastest classical supercomputer. The survey characterised it as the first practical, verifiable quantum application clearly outperforming classical methods.
Numbers like those can blur together. They shouldn't. The error-correction result answers whether correction can scale. The coherence result answers whether the qubits are getting better, not just more numerous. The gate figures answer whether operations are clean enough to correct. And Quantum Echoes answers — in one narrow, verifiable case — whether any of it can do useful work faster than a classical machine.
More qubits, fewer errors
Start with the fear that sat underneath the field for so long. A quantum state is fragile. It decays in microseconds. Build a machine out of fragile parts and the obvious worry follows: every part you add is another chance for something to go wrong.
That worry is not silly. It is the reason error correction could not simply be assumed to work. Spreading one logical qubit across more physical qubits only helps if the correction process gains more than the added hardware loses. Below the threshold, it does. Above it, it doesn't, and scaling makes things worse instead of better.
So the shape of Willow's curve matters more than any single point on it. A one-off low error rate could be a fluke of a small system. A rate that halves each time code distance rises — from 3x3, to 5x5, to 7x7 — is a pattern, and patterns can be checked, challenged and repeated. That is what separates a milestone from a press release.
What does this unlock, exactly? Not a finished machine. It unlocks the logic of building one: if correction improves as you scale it, the path to a scalable, fault-tolerant quantum computer is at least pointed in the right direction. Willow did not prove that large fault-tolerant machines are easy, or near. It proved the thing that had to be true first, at small scale, with measurements attached.
Two chips from IBM, a fast decoder from Bangalore
IBM answered with a split strategy, and the split is the story.
Its Nighthawk processor carries 120 qubits using 218 next-generation tunable couplers in a square-lattice topology. It enables circuits with up to 5,000 two-qubit gates — 30% more complex than previous generations, according to the same research survey.
Alongside it sits Loon. Loon is experimental, and its job is different: it validates all the hardware components needed for IBM's fault-tolerant "Starling" system, targeted for 2029.
Two chips, two clocks. Nighthawk pushes what noisy hardware can do today. Loon de-risks the architecture of the fault-tolerant machine IBM intends to ship before the end of the decade. The dates make that plain: Nighthawk is about now, Starling is about 2029.
Some of the year's most practical progress, though, came from neither giant.
In March 2026, QpiAI in Bangalore unveiled a high-speed decoder hardware platform that, on its 64-qubit Kaveri superconducting processor, cut error detection and correction from tens of microseconds to roughly 1.5 microseconds per correction cycle, as reported by EINPresswire.
The company called it a critical barrier to scalable, practical quantum computers. That may sound like routine launch language. The arithmetic behind it is not routine: correction has to finish inside the qubits' coherence window. If decoding takes longer than the qubits stay coherent, correction falls behind irrecoverably — no matter how elegant the code is.
Software decoders, working at tens of microseconds, were flirting with exactly that failure. Hardware acceleration at 1.5 microseconds keeps correction ahead of decoherence, and directly extends the reachable depth of computation.
QpiAI's system implements a distance-5 rotated surface code using 49 physical qubits, with each decoder instance running on a single Kaveri QPU. "The performance of our new decoder platform demonstrates a practical pathway toward scalable, hardware-accelerated quantum error correction," said QpiAI founder and CEO Nagendra Nagaraja, Ph.D. "Compatible with widely used superconducting transmon qubits, the platform limits the need for additional classical support from CPUs and GPUs."
Why coherence sets the ceiling
Coherence time is how long a qubit holds its quantum state before noise scrambles it. It is typically reported as T1, for energy relaxation, and T2, for dephasing. Why does one number get treated as the master metric? Because everything else multiplies against it.
Longer coherence means more gate operations inside each error-correction cycle, deeper circuits before failure, and less aggressive error mitigation. Shorten coherence and every other part of the system has to work harder to compensate. Lengthen it and the whole stack breathes a little easier.
That is why Willow's move to 68-microsecond T1 times, five times Sycamore's, compounds rather than merely adds: better coherence plus below-threshold correction makes every qubit meaningfully more useful. And the gain did not require abandoning the platform — Willow's fivefold jump came from the same superconducting transmon family as Sycamore, improved through fabrication and design.
Superconducting qubits dominate the 2026 milestone headlines, but they are not the only bet being placed. QpiAI itself is developing next-generation error correction methods tailored to fluxonium-based qubits — a superconducting variant with intrinsically longer coherence — as well as architectures designed to operate across distributed systems, in the same spirit as the distributed networks now challenging centralised computing, according to the company's March 2026 announcement.
While full error correction matures, the industry also has a bridge to cross, and it is called error mitigation. Error mitigation means techniques that suppress noise without the full overhead of logical qubits. IBM has demonstrated 24% accuracy improvements through dynamic circuits combined with HPC-powered error mitigation, reportedly achieving a 100x cost reduction versus earlier approaches, according to the 2025–2026 quantum research survey.
Mitigation and correction are easy to confuse, and the difference matters for enterprise planning. Mitigation extends what noisy hardware can do today. Correction is what makes the machines scalable tomorrow.
The most credible roadmaps refuse to choose. They pursue both in parallel. That is exactly what the EU's Q-VERSE project is funding: Simula leads a 36-month Horizon Europe effort building automated testing frameworks, intelligent hybrid orchestration that splits tasks between classical and quantum processors — the kind of orchestration already familiar from multi-agent systems moving into production — and machine-learning-based noise filtering, validated across railway scheduling, portfolio optimisation, drug design and telecom analytics.
There is a discipline in keeping those two ideas separate, and it protects planning from a familiar mistake. If mitigation is mistaken for correction, today's noisy machines get judged by tomorrow's standard and look like failures. If correction is mistaken for something mitigation can deliver, today's machines get credited with a scalability they have not shown. A 24% accuracy improvement and a 100x cost reduction describe a bridge getting stronger, not a destination already reached.
A gap that turned into engineering
Below-threshold error correction has been demonstrated, but only on small logical-qubit counts. Scaling to the hundreds or thousands of logical qubits needed for commercially relevant chemistry or cryptanalysis remains a multi-year engineering programme. That gap is one reason the migration to post-quantum cryptography is being planned now, and why standards and governance frameworks are being written while the machines are still young. IBM's own roadmap doesn't promise fault tolerance until Starling in 2029.
Put plainly: current systems excel at demonstrations. The workloads that would justify the industry's valuation — practical chemistry, materials discovery, optimisation at commercial scale — need hundreds of dependable logical qubits, and nobody has them yet.
What has changed is the nature of the gap. It is no longer a physics question about whether correction can work. It is an engineering programme with named obstacles: more logical qubits, faster decoders, better fabrication. Engineering programmes can be scheduled. Physics mysteries cannot.
There is another constraint, less discussed, and it has nothing to do with qubits. People. Quantum error correction sits at the intersection of device physics, information theory and real-time systems engineering — a combination taught in very few programmes worldwide. As multiple hardware vendors race in parallel, competition for decoder designers, cryogenic control engineers and fault-tolerance theorists has intensified.
So what should a reader watch next? Three milestones will define the phase that follows. First, logical-qubit counts: demonstrations must grow from a handful of logical qubits to dozens while holding below-threshold behaviour. Second, decoder latency at scale: QpiAI's 1.5-microsecond cycles need to hold as code distances grow. Third, IBM's Starling timeline: hitting the 2029 target would validate the entire industry's roadmap, and missing it would say something just as clear.
None of these are guaranteed. But for the first time, the field has measurable, falsifiable milestones rather than vague promises. Starling's 2029 date is less a promise than a marker the whole industry will be measured against.
What 2026 established is arguably more important than any single number: a working formula, executed in parallel by independent players such as Google, IBM and QpiAI. Improve coherence. Demonstrate below-threshold correction. Accelerate decoding. Quantum hardware is only half of the story; quantum neural networks are starting to reshape enterprise automation.
Every coherence record shortens someone else's migration window. The defensive schedule is already published — the post-quantum migration built on NIST standards, Kyber-768 and TLS 1.3 assumes machines like these arrive on the earlier estimates. The trajectory now looks like engineering rather than physics experiments. That does not make the destination close. It makes the road visible — and a visible road can be walked, measured, and argued about with evidence instead of faith.
Sources
- GitHub (blevene/giga-research-skill) — "Quantum Computing 2025–2026" research report (Willow, Nighthawk, Loon milestones) — github.com
- EINPresswire — "QpiAI Achieves High-Speed Quantum Error Correction on Superconducting Systems with New Decoder Platform" (March 25, 2026; Nagendra Nagaraja quote) — einpresswire.com
